Wafer-Level Chip-Scale Packaging: Analog and Power Semiconductor Applications
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Wafer-Level Chip-Scale Packaging: Analog and Power Semiconductor Applications

by Yong Liu, Shichun Qu

electronics Semiconductor Technology Packaging Engineering
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Wafer-Level Chip-Scale Packaging: Analog and Power Semiconductor Applications presents a focused examination of wafer-level chip-scale packaging in the context of analog and power semiconductors. Written by Yong Liu and Shichun Qu, this technical title explores a specialized area of semiconductor engineering and electronics.

About This Book

Wafer-Level Chip-Scale Packaging: Analog and Power Semiconductor Applications focuses on wafer-level chip-scale packaging within the fields of analog and power semiconductors.

The book addresses a specialized area of semiconductor engineering and electronics, as indicated by its title.

Authored by Yong Liu and Shichun Qu, it is suited to readers seeking a technical treatment of packaging applications for analog and power semiconductor devices.

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I will be using this book for: